Come intern with one of the largest engineering companies in the world. A Validation Engineering Intern creates, defines, develops system validation environment and test suites. Uses and applies emulation and platform level tools and techniques to ensure performance.
Responsible for the development of methodologies execution of validation plans and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture Design and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on die debug features.
The ideal candidate should exhibit the following behavioral traits:
Communication and interpersonal skills to write status reports.
Share strategies and ask questions.
Quantitative, analytical, problem/conflict resolution skills.
Effective prioritization and time management skills.
Work autonomously and collaboratively in a team environment.
Work in a dynamically changing environment which requires ingenuity and skills to solve issues.
This internship position has a length of 6 -12 months with the possibility to extend it as per business' needs.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
Minimum Qualifications
The candidate must be pursuing a Masters or PhD degree in Electrical Engineering, Computer Engineering or any other related field.
6+ months of experience or equivalent coursework in the following areas:
Very Large-Scale Integration (VLSI) or Complementary Metal -Oxide-Semiconductor (CMOS) technology or Verilog.
Digital Design.
Scripting languages: PERL or Python.
Preferred Qualifications
Experience in FPGA.
Experience in Post silicon testing or validation.
JobType
Hybrid
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